1. Field of the Invention
The present invention relates to active filters, and in particular, to calibration circuitry for tuning active filters.
2. Description of the Related Art
Increasing demands for wireless communications has accelerated developments of integrated circuits (ICs) in which all, or nearly all, necessary functions are integrated within one IC. Such single-chip implementations include filtering functions which have become increasingly critical and impose increasingly precise design requirements due to complex signal processing involved with high frequency digital signals.
Design and manufacturing of active continuous-time filters using IC technology poses many challenges due to the fact that integrated active filters require circuit components having values with high degrees of precision. Further, such precise component values must be maintained during the entire expected operating life of the circuitry. However, with normal variations in IC fabrication processes, normal operating temperature ranges and aging of components, such strict requirements are virtually impossible to maintain with little or no variations. Accordingly, it has become increasingly common to embed an automatic tuning mechanism within the IC as part of the overall circuitry.
Referring to FIG. 1, one conventional technique for tuning an active filter is based on indirect tuning where analog circuitry in the form of a phase-locked loop (PLL) provides the tuning mechanism. In accordance with well known conventional PLL techniques, the PLL 12 provides the control signal 13 to a master filter circuit 14 which, in turn, provides the feedback signal 15 to the PLL 12. Together, the PLL 12 and master filter 14 form an oscillator from which the feedback signal 15 is generated and intended to be phase-locked to the input reference signal 11r. When the PLL 12 has achieved a phase locked condition, i.e., locked to the phase of the reference signal 11r, the master filter is tuned to its desired frequency characteristics. This tuning state of the master filter 14 is reflected in the control signal 13 during phase lock. Accordingly, with this same control signal 13 applied to the slave filter 16, which is designed to match the master filter 14, the slave filter 16 also now has the desired frequency characteristics for filtering the incoming signal 11i to produce the desired output signal 17.
This tuning technique can be applied to a variety of integrated active filters, such as transconductance-capacitor (Gm-C) filters or metal oxide semiconductor field effect transistor (MOSFET) resistor-capacitor (RC) filters. However, two problems associated with this technique involve the high degree of matching required between the master 14 and slave 16 filters, as well as the performance of the analog PLL circuit 12. While problems associated with the matching of the master 14 and slave 16 filters can be minimized using direct tuning techniques, such as in-situ tuning, several forms of which are well known in the art, problems associated with the use of analog PLL circuitry 12 remain.
Referring to FIG. 2, one technique which has been used to overcome limitations of analog circuitry uses digital circuits for performing the tuning operation. Using digital circuitry in an automatic tuning mechanism can be advantageous in that the performance and complexity of the tuning mechanism can be scaled in a parallel manner with advances in very large scale integration (VLSI) technology. One such implementation 20 uses a phase comparison successive approximation tuning technique with which the complexity and limitations of analog tuning circuitry are significantly reduced. As shown, an input reference signal 21 (with signal frequency fref) is filtered by a continuous time active filter 22 serving as the master filter. The filtered input signal 23 and the original input signal 21 are compared against respective threshold voltages V1, V2 in voltage comparators 24a, 24b. The resultant signal 25a based upon the filtered input signal 23 is latched in a flip-flop 26 in accordance with a clock signal 25b generated based upon the original input signal 21. The latched signal 27 is used by a successive approximation register and control logic 28 to produce a digital approximation signal 29 which is converted to an analog control signal 31 by a digital-to-analog converter (DAC) 30. This control signal 31 runes the master filter 22, and also provides the control signal Vcontrl for the slave filter (not shown).
All of the components in this implementation 20 are well known in the art. For example, the successive approximation register 28 can be the 74/54LS502 manufactured by National Semiconductor Corporation of Santa Clara, Calif.
Notwithstanding the potential for improved performance, such an implementation 20 does have its own problems. For example, with the need for two comparators 24a, 24b, any mismatches in the signal phases or other forms of incoherence between the input signals 23, 21 to the comparators 24a, 24b can result in erroneous data latching or phase jitter within the latched data signal 27, thereby causing the approximation signal 29, and therefore, the filter control signal 31, to have errors.
In accordance with the presently claimed invention, a time constant-based calibration circuit is provided for tuning active filter circuitry. A time constant, e.g., corresponding to that of the active filter circuitry, within the calibration circuit is monitored and maintained at a desired value using successive approximation, with continuous calibration of the time constant performed using digital circuitry and a digital feedback signal to control the time constant.
In accordance with one embodiment of the presently claimed invention, time constant-based calibration circuitry for tuning active filter circuitry includes tunable signal generator circuitry, signal comparison circuitry and successive approximation circuitry. The tunable signal generator circuitry, having associated therewith a first controllable time constant, responds to reception of a digital tuning control signal and first and second reference signals having mutually proportional respective DC values by providing a DC signal and an AC signal, wherein the DC signal has a magnitude responsive to the digital tuning control signal and related to the first controllable time constant, and the AC signal has a predetermined waveshape with a temporally variant magnitude. The signal comparison circuitry, coupled to the tunable signal generator circuitry, compares the DC and AC signals and in response thereto provides a digital result signal indicative of a difference between the DC and AC signal magnitudes. The successive approximation circuitry, coupled to the signal comparison circuitry, responds to reception of the digital result signal by providing the digital tuning control signal indicative of an approximation corresponding to a plurality of successive values of the digital result signal.
In accordance with another embodiment of the presently claimed invention, time constant-based calibration circuitry for tuning active filter circuitry includes tunable signal generator means, signal comparison means and successive approximation means. The tunable signal generator means, having associated therewith a first controllable time constant, is for responding to reception of a digital tuning control signal and first and second reference signals having mutually proportional respective DC values by generating a DC signal and an AC signal, wherein the DC signal has a magnitude responsive to the digital tuning control signal and related to the first controllable time constant, and the AC signal has a predetermined waveshape with a temporally variant magnitude. The signal comparison means is for comparing the DC and AC signals and in response thereto generating a digital result signal indicative of a difference between the DC and AC signal magnitudes. The successive approximation means is for responding to reception of the digital result signal by generating the digital tuning control signal indicative of an approximation corresponding to a plurality of successive values of the digital result signal.
In accordance with still another embodiment of the presently claimed invention, a method of using time constant-based calibration for tuning active filter circuitry includes:
receiving a digital tuning control signal;
receiving first and second reference signals having mutually proportional respective DC values;
generating a DC signal having a magnitude responsive to the digital tuning control signal and the first reference signal and related to a first controllable time constant;
generating an AC signal responsive to the second reference signal and having a predetermined waveshape with a temporally variant magnitude;
comparing the DC and AC signals and in response thereto generating a digital result signal indicative of a difference between the DC and AC signal magnitudes; and
processing the digital result signal for generating the digital tuning control signal indicative of an approximation corresponding to a plurality of successive values of the digital result signal.